1. Field of the Invention
This invention relates to a semiconductor device and manufacturing method thereof, and, in particular, relates to a suitable technique for improving recovery characteristic of diodes.
2. Discussion of the Background
FIG. 17 is a cross section illustrating a basic structure of a diode. In FIG. 17, on a surface of an N substrate 4P comprising an N+ layer 1P and Nxe2x88x92 layer 2P, an anode region 3P is formed by diffusing P type impurities. An anode electrode 5P is formed on a surface of the anode region 3P, and a cathode electrode 6P is formed on a rear surface of the N substrate 4P. Operation of the diode is described as follows.
In the structure of FIG. 17, a predetermined anode voltage VAK (forward bias) is applied between the anode electrode 5P and cathode electrode 6P and, when the anode voltage exceeds a certain threshold value (xcx9c0.6 V), holes are injected from the anode electrode 5P into the Nxe2x88x92 layer 2P, and thus the diode conducts. When a predetermined anode voltage VKA (reverse bias) is applied between the cathode electrode 6P and anode electrode 5P, no current flows in the diode until the reverse bias VKA reaches a breakdown voltage of a PN junction comprising the anode region 3P and Nxe2x88x92 layer 2P. The mentioned situation is shown in FIG. 18. Note that FIG. 18 is also employed in a description of preferred embodiments of the present invention, together with FIG. 19.
Meanwhile, characteristics obtained when an anode voltage applied to a diode is changed from forward bias to reverse bias is called reverse recovery characteristic (recovery characteristic), and it is known that the reverse recovery characteristic shows transition of current with time (transient response). In FIG. 19, symbol Irr denotes a peak value of current (recovery current) Ir that flows in the reverse direction, symbol Trr denotes time required until the current Ir flown in the reverse direction dissipates, and symbol If denotes a current value at the time of forward bias.
In the reverse recovery characteristic, there has been a desire for one in which the magnitude of the peak current Irr of the recovery current is small and current IR flowing in the reverse direction dissipates slowly. That is, with time T1, T2 determined as shown in FIG. 19, it is defined that recovery characteristic is hard when T1 greater than T2, and recovery characteristic is soft when T1 less than T2. When a diode is used in a combination with a main switching element such as IGBT, if recovery characteristic is hard, heat generation is caused due to the occurrence of surge voltage and switching loss. Therefore, to avoid these, there is a desire for characteristics having a low loss and soft recovery (a reduction in the transition of current Ir with time dIr/dt). Hereinafter, the peak value Irr of the recovery current Ir is called xe2x80x9crecovery peak current.xe2x80x9d
As to the transient response of the current Ir following in the reverse direction, the following points are found out by the recent researches and studies. That is, {circle around (1)} the recovery peak current Irr depends upon the carrier density of a semiconductor region in the vicinity of an anode electrode, and the recovery peak current Irr decreases as the carrier density decreases. In addition, {circle around (2)} it is known that the mentioned dissipation time Trr depends upon the carrier density of a semiconductor region in the vicinity of a cathode electrode, and the dissipation time Trr extends as the carrier density of the cathode region increases.
In view of these research results, a large number of structures for improving the reverse recovery characteristic have been proposed conventionally.
(I) In the first place, there is a technique which is, for example, disclosed in Japanese Patent Unexamined Publication No. P08-46221A, and pointed out as a conventional technique in Mitsubishi Denki Giho and Precedings of National Convention of IEEJ, Industrial Application Section, 1995 (No. 136, p79), both of which are described later. That is one in which a heavy metal represented by platinum serving as a lifetime killer, is doped and diffused from the anode electrode side, so that the lifetime of an N type layer in the vicinity of a PN junction part is controlled such as to be short. Especially, with this technique, the diffusion of platinum can be controlled such that the lifetime of the carriers in the N type layer on the cathode electrode side is longer than the lifetime of the surrounding of the PN junction part on the anode side. It is therefore possible to increase the carrier density on the cathode side, thereby increasing the mentioned dissipation time Trr.
Even with the first conventional technique, however, the problem remains in the point that it is not easy to control more shortly the lifetime of the carriers in the N type layer on the anode side, including the problems of homogeneity and reproducibility.
(II) A second conventional technique is one which is disclosed in Patent Publication No. 59(1984)-49714. A cross-sectional structure of a diode to which this conventional technique is applied is shown in FIG. 20. In FIG. 20, the same symbol as in FIG. 17 denotes the same. With the second conventional technique, an anode region 3P to be formed on a surface is formed partially for suppressing the injection of holes from the anode regions 3P, thereby the carrier density in the surrounding region of an anode electrode 5P is lowered to reduce a recovery peak current Irr.
In this structure, however, there newly arises the problem that, although the carrier density in the vicinity of the anode is controlled by the partially formed anode regions 3P and clearances W therebetween, a breakdown voltage lowers when the clearance W is too large, and thus this point constitutes obstruction to a sufficient control of the carrier density in the vicinity of the anode.
(III) As a diode structure employing a third conventional technique, there is one which is disclosed in Mitsubishi Denki Giho Vol. 67. No. 9. 1993, PP94-97. Although this is basically the same in structure as that shown in FIG. 17, it aims to improve reverse recovery characteristic by changing the structure of an anode region to be formed on a surface. That is, in the technique of the Technical Report, by reducing thickness of an anode region 3P shown in FIG. 17, and reducing the surface concentration of the anode region, injection of holes from the anode region 3P is suppressed and thus the carrier density in the vicinity of the anode is lowered to reduce a recovery peak current Irr. It is reported that, with this technique, the recovery peak current Irr is reduced by about 40%, and a slope dIr/dt at the time of recovery is reduced to about xc2xd.
With this structure, it is however necessary to set thickness and concentration of the anode region 3P to a certain degree of value in order to ensure a breakdown voltage, and there are limitations in reducing thickness and concentration of the anode region. Therefore, as in the case with the second conventional technique (II), there remains the problem that the carrier in the vicinity of the anode cannot be controlled sufficiently.
(IV) In addition, as a diode structure to which a fourth conventional technique is applied, there is one which is disclosed in Precedings of National Convention of IEEJ, Industrial Application Section, 1995, PP79-80. This structure is shown in FIG. 21. In FIG. 21, the same symbol as in FIG. 17 denotes the same. Symbol 2PP in FIG. 21 shows a region that is damaged by proton implantation. In this conventional technique, in order to reduce loss at the time of recovery in a pin structure, an irradiation of electron beam is conducted in place of the mentioned platinum doping, to reduce the lifetime in the carriers in an n layer and increase a dissipation time Trr. Further, the lifetime of an n-layer is controlled locally by proton implantation, so that the carrier density in the vicinity of the anode region is lowered to diminish a recovery peak current Irr. Thereby, it is reported that a slope dIr/dt was reduced to below xc2xd and the recovery peak current Irr was reduced by about 40%, as compared with the case of employing an irradiation of electron beam alone.
However, the following problem can be pointed out relative to this structure. That is, as the present applicant proves later, when the amount of proton implantation (proton dose) is raised to a practical level, the breakdown voltage becomes markedly lower, such that the carrier in the vicinity of the anode region cannot be sufficiently controlled as in the case with the first, second and third conventional techniques.
In practice, the present applicant prepared experimentally the same sample as that of the fourth conventional technique by proton implantation. FIG. 22 shows the experimental result which was obtained by evaluating the withstand voltage or breakdown voltage of this prototype against an increase in proton dose. FIG. 22 also shows the result of measurement. of the recovery peak current Irr against forward current If that has been flown prior to the recovery (see FIG. 19). In this experiment, by adjusting the accelerated energy of proton beam by a buffer such as aluminum foil, its dose is changed while proton implantation is applied to the vicinity of the anode, followed by heat treatment of 340xc2x0 C. and the breakdown voltage is then evaluated to obtain the result. In FIG. 22, the abscissa indicates a proton dose expressed as a relative value, and the left ordinate indicates a breakdown voltage Vr and the right ordinate indicates a ratio (Irr/If). Hereat, as stated earlier, only proton dose is changed while fixing the depth where proton is implanted, or implantation position. As shown in FIG. 22, it is apparent that the breakdown voltage Vr decreases as the proton dose increases (see FIG. 23 for comparison). Note that the cause for this decrease in breakdown voltage Vr will be described later.
The case of the fourth conventional technique shown in FIG. 21 corresponds, in the experimental result of FIG. 22, to the case where the relative value of proton dose is approximately 1. However, in order that a low lifetime region having a further shorter carrier lifetime than that obtained by diffusion of a heavy metal or irradiation of electron beam, is formed effectively in an Nxe2x88x92 layer by proton implantation, (that is, in order to further reduce the recovery peak current Irr,) it is necessary to increase proton dose, and a value of about 10 to 100 cmxe2x88x923 in relative value is practically desired as a proton dose, as can be appreciated by the result of measurement of ratio (Irr/If) in FIG. 22
Upon this, as shown in FIG. 22, when proton dose is increased to such a degree of magnitude, the influence due to the deterioration of breakdown voltage increases to such a degree that it cannot be ignored, and thus device characteristics will eventually have to be impractical. This is a serious problem of the fourth conventional technique employing proton implantation. In this sense, it can be said that the fourth conventional technique failed to make a sufficient consideration of optimization as to a local lifetime control.
This invention has been accomplished for solving all the foregoing problems. That is, a first object of this invention is to realize a semiconductor device having a new structure characterized in that: as reverse recovery characteristic, even if the lifetime of carriers in a first semiconductor layer is controlled {circle around (1)} such that a recovery peak current (Irr) is further reduced by lowing the carrier density in the vicinity of a third semiconductor layer, and {circle around (2)} such that a recovery current dissipation time (Trr) is extended by raising the carrier density in the first semiconductor layer in the vicinity of the surface side opposed to the, interface between the first and second semiconductor layers, {circle around (3)} there occurs no decrease in breakdown voltage.
In particular, the gist of this invention resides in satisfying the contents {circle around (1)} and {circle around (3)} at the same time. In this case, the content {circle around (2)} can also be realized by applying, for example, the mentioned first conventional technique to optimize the carrier density of the first semiconductor layer. This point is also a secondary object of this invention.
A second object of this invention is to provide a manufacturing method for realizing a semiconductor device having characteristics of the contents {circle around (1)}, {circle around (3)} and {circle around (2)}.
For achieving the first object, a semiconductor device in accordance with this invention is provided as the following first to ninth aspects.
Specifically, a semiconductor device according to the first aspect comprises: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type having a first main surface and a second main surface opposed to the first main surface, the first main surface and a main surface of the first semiconductor layer forming a first interface; and a third semiconductor layer of a second conductivity type having a main surface which forms a second interface together with the second main surface of the second semiconductor layer, wherein a second lifetime in the second semiconductor layer is smaller than a first lifetime in the first semiconductor layer; and a resistance value in the second semiconductor layer decreases monotonically from the second interface to the first interface.
The second semiconductor layer is a low lifetime region having a high resistance value, and its resistance value merely decreases monotonically. Therefore, the carrier lifetime of the impurity increases monotonically from the second semiconductor layer to the first semiconductor layer. This enables to maintain a large value without deteriorating the breakdown voltage (withstand voltage) of a PN junction although the low lifetime region is generated between the first and third semiconductor regions. By such lifetime reduction, the carrier density in the vicinity of the second interface is reduced sufficiently. Thus, as compared to the mentioned first to fourth techniques, a peak value of a recovery current that flows when the bias applied to the PN junction is changed from forward bias to reverse bias, can be further reduced, and thus soft recovery characteristic can be improved considerably.
A semiconductor device according to the second aspect is characterized in that the second lifetime in the first aspect is smaller than {fraction (1/10)} of the first lifetime.
Thereby, the carrier density of the first semiconductor layer is optimized. This permits on state voltage reduction when the device of this aspect is applied to a diode, and thus leads to an extension of recovery current dissipation time at the time of recovery.
A semiconductor device according to the third aspect is characterized in that a second resistibility of the second semiconductor layer in the first aspect is greater than 50 times of a first resistibility of the first semiconductor layer.
Thereby, the carrier density of the first semiconductor layer can be optimized.
A semiconductor device according to the fourth aspect is characterized in that the thickness between the first interface of the second semiconductor layer and the other main surface opposed to the main surface of the third semiconductor layer in the first aspect is set such that a peak value of current flowing when voltage applied between the first semiconductor layer and the third semiconductor layer is changed from forward bias to reverse bias is smaller than a peak value of the current on the assumption that the second semiconductor layer is absent.
Thereby, thickness of the second semiconductor layer is controlled to an optimum value that is required in view of an improvement of recovery characteristic of a diode. Therefore, when the device of this aspect is applied to a diode, it is possible to realize a diode having a softer recovery characteristic with a small recovery peak current, without causing deterioration in breakdown voltage.
A semiconductor device according to the fifth aspect is characterized in that the thickness in the fourth aspect is set to a value in a range of from 15 micrometers to 40 micrometers.
Thereby, the carrier density in the vicinity of the interface between the second and third semiconductor layers is reduced and the carrier density of the first semiconductor layer is optimized. Therefore, the recovery characteristic of a diode, namely, a peak current of a recovery current, can be further reduced, and the recovery current dissipation time can be further extended.
A semiconductor device according to the sixth aspect is characterized in that the semiconductor device in the fifth aspect is used as a free-wheel diode.
This realizes a free-wheel diode having a large breakdown voltage and a low loss soft recovery characteristic, thus making it possible to realize a power module having less power loss due to surge voltage or the like.
A semiconductor device according to the seventh aspect comprises: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type which is formed on a surface of the first semiconductor layer and damaged throughout all regions thereof by implantation of a predetermined ion except for hydrogen ion; and a third semiconductor layer of a second conductivity type which is formed on a surface of the second semiconductor layer.
Thereby, when the second semiconductor layer is damaged, it merely turns to be a high resistance region and it cannot become a donor nor acceptor. Further, in the second semiconductor layer, resistibility decreases monotonically, and the carrier lifetime is shortened sufficiently than that of the carriers in the first semiconductor layer. Thereby, the carrier density in the vicinity of the interface between the second and third semiconductor layers is reduced sufficiently. As a result, the recovery peak current in the recovery characteristic obtained when the device of this aspect is applied to a diode is reduced sufficiently, and breakdown voltage is free from any influence.
A semiconductor device according to the eighth aspect is characterized in that the predetermined ion in the seventh aspect is helium ion.
Thereby, the second semiconductor layer can be easily provided with the property serving as a low lifetime region by implanting a general-purpose ion, i.e., helium ion.
A semiconductor device according to the ninth aspect is characterized in that the first semiconductor layer in the eighth aspect comprises diffused heavy metals.
Thereby, the carrier lifetime of the first semiconductor layer is longer than the lifetime of the second semiconductor layer, and the carrier density of the first semiconductor layer is optimized. Therefore, when the device of this aspect is applied to a diode, time required until a recovery current at the time of recovery dissipates completely can be further extended by preventing an increase in on state voltage generated upon formation of a low lifetime layer, during on state.
For achieving the mentioned second object, a method of manufacturing a semiconductor device according to this invention is provided as the following tenth to sixteenth aspects.
Specifically, a method of manufacturing a semiconductor device according to the tenth aspect comprises: a first step of preparing a first semiconductor layer of a first conductivity type having a first lifetime; a second step of forming a second semiconductor layer of a second conductivity type on a surface of the first semiconductor layer; and a third step of forming a low lifetime region extending from the surface of the first semiconductor layer to a predetermined position of the inside of the first semiconductor layer and having a second lifetime smaller than the first lifetime and a resistance value monotonically decreasing from the surface of the first semiconductor layer.
With the tenth aspect of the invention, since the low lifetime region is formed, it is possible to realize a semiconductor device in which a junction comprising the first and second semiconductor layers has {circle around (1)} no deterioration in breakdown voltage, and {circle around (2)} a soft recovery characteristic with, a further small peak value of recovery current.
A method of manufacturing a semiconductor device according to the eleventh aspect is characterized in that the third step in the tenth aspect comprises a step of implanting a predetermined ion except for hydrogen ion, from the surface side of the second semiconductor layer to the predetermined position in the inside of the first semiconductor layer.
With the eleventh aspect of the invention, the low lifetime region can be formed with ease by a physical method of implanting a predetermined ion except for proton, thereby providing a method of manufacturing a semiconductor device which is realized easily.
A method of manufacturing a semiconductor device according to the twelfth aspect is characterized in that the predetermined ion in the eleventh aspect is helium ion.
With the twelfth aspect of the invention, there is the effect of providing a practical method of manufacturing a semiconductor device in the point that it is possible to manufacture a semiconductor device of a new structure by using a general-purpose helium ion source.
A method of manufacturing a semiconductor device according to the thirteenth aspect is characterized in that the depth from the surface of the second semiconductor layer to the predetermined position in the eleventh aspect is controlled in a range of from 15 micrometers to 40 micrometers.
With the thirteenth aspect of the invention, the depth where a predetermined ion is implanted can be controlled suitably. This leads to the effect that a semiconductor device having an improved soft recovery characteristic can be manufactured reliably with no influence upon breakdown voltage. Especially with this aspect, the low lifetime region can be formed such as to exert no influence on the first lifetime of the first semiconductor layer.
A method of manufacturing a semiconductor device according to the fourteenth aspect is characterized in that the third step in the eleventh aspect further comprises a step of performing a first heat treatment to the semiconductor device after the step of the predetermined ion implantation.
With the fourteenth aspect of the invention, a predetermined heat treatment is performed to the part which is damaged by a predetermined ion implantation. This leads to the effect that the damaged part can be formed steadily.
A method of manufacturing a semiconductor device according to the fifteenth aspect is characterized in that: the second step in the fourteenth aspect further comprises a step of forming a main electrode on a surface of the second semiconductor layer; and the predetermined ion implantation is performed by using a predetermined ion source disposed on the main electrode side.
With the fifteenth aspect of the invention, the predetermined ion source is disposed on the first main electrode side. Therefore, a predetermined ion can be implanted from the surface side of the second semiconductor layer into the first semiconductor layer in the vicinity of the interface between the first and second semiconductor layers. Thereby, it is possible to control such that a predetermined ion implantation position with respect to the interface has less variation.
A method of manufacturing a semiconductor device according to the sixteenth aspect is characterized in that the second step in the fourteenth aspect further comprises a step of diffusing a heavy metal from the surface of the first semiconductor layer to the inside of the first semiconductor layer and performing a second heat treatment after the step of forming the second semiconductor layer.
The sixteenth aspect of the invention produces the following advantages.
Specifically, since the relationship of: (the second heat treatment temperature) greater than (the first heat treatment temperature) is established, the influence of the second heat treatment on the third step can be offset by performing the higher-temperature second heat treatment prior to the first heat treatment. That is, the carrier lifetime control by a predetermined ion implantation and the lifetime control by diffusion of a heavy metal can be performed separately. With this aspect, the inside of the first semiconductor layer is subjected to lifetime reduction caused by the heavy metal, resulting in a distribution that the first lifetime of the first semiconductor layer increases monotonically from the interface between the first semiconductor layer and the low lifetime region to the inside of the first semiconductor layer. Therefore, the reverse current dissipation time in recovery characteristic can be extended by increasing the carrier density on the opposite surface side to the interface between the first semiconductor layer and the low lifetime region.